HCiM: ADC-Less Hybrid Analog-Digital Compute in Memory Accelerator for Deep Learning Workloads
Published in ASP-DAC, 2025
This paper proposes an adcless hyrbid analog digital CiM accelerator
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Publications
You can also find my articles on my Google Scholar profile.
Algorithm Hardware Co-design for ADC-Less Compute In-Memory Accelerator
Published in TCASAI, 2024
This paper is an extension of HCiM showing accuracy considering the analog non-idealities in the crossbar array.
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SpiDR: A Reconfigurable Digital Compute-in-Memory Spiking Neural Network Accelerator for Event-based Perception
Published in under review, 2024
This paper proposes a digital compute in memory accelerator for SNNs
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Best of both worlds: hybrid SNN-ANN architecture for event-based optical flow estimation
Published in IROS, 2024
This paper proposes a hybrid SNN-ANN model to efficiently process the sparse spatio-temporal data from event-based camera
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NAX: Neural Architecture and Memristive Xbar based Accelerator Co-design
Published in DAC, 2022
This paper is on Neural Network and IMC accelerator architecture co-design.
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